In a nonvolatile semiconductor memory, such as a flash memory, an error correction code is stored along with data, so that the reliability of data may be improved. The reliability of data may be further improved if the data of a block, in which an error has been corrected, is rewritten to other block. A related art is discussed in Japanese Laid-open Patent Publication No. 2002-108722.
The error correction code is automatically generated by a memory control circuit or the like based on write data. For this reason, a data processing unit which writes data to a flash memory may not directly read the error correction code. Usually, in the flash memory, it is not possible to perform the rewriting from the logic “0” indicative of the write state to the logic “1” indicative of the erase state. For this reason, for example, when there is a bit with the logic “0” in an error correction code storage area, in a state of a data storage area being erased, an error correction code generated based on write data may not be correctly written to the error correction code storage area. At this time, it is not possible to determine whether this is a problem due to the life of the flash memory or a problem due to the fact that the error correction code storage area has not been erased. In order to prevent this problem, an erase operation needs to be performed every time before initially writing data for each block which is the unit of erasure. This increases the number of times of erasure and shortens the life of the product.